1. Technical Field
The disclosure relates to a phase-locked loop, and more particularly, to a device of phase-locked loop and the method using the same.
2. Related Art
Please refer to FIG. 1, in which phase-locked loop (PLL) is widely used in wire or wireless communication systems. Generally, PLL includes a phase frequency detector 50, a charge pump 60, a low pass filter 70, a voltage-controlled unit 80, and a divider 90. PLL uses a feedback signal to lock the output clock and phase of an output end at the reference clock and phase of an input end in a circuit loop. Consequently, the objective of PLL is to stabilize the output clock and phase, and reduce the variation thereof. PLL had been developed decades, and mostly used in a system which needs precise clock and frequency.
There are many situations in which PLL is needed to acquire a precise frequency for the system operation; for example, TV, Radio, etc products all have need of frequency modulation for wireless signal transmission, CD, PC, etc products have the need of clock control, and satellite, measuring instrument, etc products have the need of stability and precision. Otherwise, in communication field, both transmitter and receiver need a high frequency signal source from a frequency synthesizer of PLL, which the output frequency is able to be provided as a local oscillation frequency. The local oscillation frequency is used for up converting a base band signal to a radio frequency signal then to be transmitted by the transmitter. After the receiver receiving the radio frequency signal, the original signal is reversed by demodulation of the radio frequency signal.
Nowadays, electronic product designs are guided to energy saving thinking due to the energy saving and carbon reduction trend. The Ethernet technology is also guided to energy saving in detail, IEEE P802.3az standard (Energy Efficient Ethernet, EEE), for Ethernet released by Broadcom is one example of the effort. The disclosure turns off the phase-locked loop when the network communication stops for effectively saving the energy assumption of the network chip under the EEE standard.
To realize EEE standard, a network chip should save energy more effectively. PLL consumes a lot of energy in a chip, which is usually 5 mA on average. For the purpose of saving energy, turning PLL off could save a lot of energy; however, the long start-up time may cause other errors inside the network chip.